diff --git a/src/reactor/mod.rs b/src/reactor/mod.rs index 914e3fc37..5cd047c58 100644 --- a/src/reactor/mod.rs +++ b/src/reactor/mod.rs @@ -136,6 +136,13 @@ enum Message { Run(Box), } +#[repr(usize)] +#[derive(Clone, Copy, Debug, PartialEq)] +enum Readiness { + Readable = 1, + Writable = 2, +} + const TOKEN_MESSAGES: mio::Token = mio::Token(0); const TOKEN_FUTURE: mio::Token = mio::Token(1); const TOKEN_START: usize = 2; @@ -320,11 +327,13 @@ impl Core { if let Some(io) = inner.io_dispatch.get_mut(token) { if ready.is_readable() || ready.is_hup() { reader = io.reader.take(); - io.readiness.fetch_or(1, Ordering::Relaxed); + io.readiness.fetch_or(Readiness::Readable as usize, + Ordering::Relaxed); } if ready.is_writable() { writer = io.writer.take(); - io.readiness.fetch_or(2, Ordering::Relaxed); + io.readiness.fetch_or(Readiness::Writable as usize, + Ordering::Relaxed); } } drop(inner); @@ -471,8 +480,8 @@ impl Inner { debug!("scheduling direction for: {}", token); let sched = self.io_dispatch.get_mut(token).unwrap(); let (slot, bit) = match dir { - Direction::Read => (&mut sched.reader, 1), - Direction::Write => (&mut sched.writer, 2), + Direction::Read => (&mut sched.reader, Readiness::Readable as usize), + Direction::Write => (&mut sched.writer, Readiness::Writable as usize), }; if sched.readiness.load(Ordering::SeqCst) & bit != 0 { *slot = None;